An important step in developing a circuit is analyzing a design of the circuit. The analysis can be used to detect design weaknesses/flaws in the circuit, which can be fixed prior to building and testing the circuit. Further, the analysis can be used to characterize one or more performance attributes of the circuit, such as a standard circuit block, which then can be used when analyzing a larger circuit, in which the standard circuit block is included. To this extent, an accurate analysis of a design is important to reducing the overall cost to produce the circuit and/or increasing the performance/quality of the circuit.
One challenge to accurate analysis is known as the “history effect”. The history effect refers to the fact that one or more performance attributes of the circuit is impacted by a large number of the previous execution cycles. For example, in a Silicon-on-Insulator (SOI) transistor, a body (or base) node is generally only connected to the remainder of the circuit through reverse biased p-n junctions and/or other similarly weak leakage mechanisms. To this extent, the body node is largely insulated from the rest of the circuit and only weak direct currents are possible to and from the body node. As a result, any charge at the body node will accumulate/dissipate at a far slower rate (e.g., orders of magnitude slower) than the operation of the circuit, and the charge of any body node will be a function of what occurred during thousands of the previous execution cycles. However, an amount of the charge at the body node exerts a strong effect on one or more performance attributes (e.g., threshold voltage) of the transistor, which in turn impacts the overall circuit performance.
In general, current circuit simulators determine a voltage at each node in the circuit by solving for the DC equilibrium of the circuit. For each node on a SOI transistor, this requires solving a matrix that includes the voltages at each adjacent node in the circuit. Since the body node is largely insulated from the rest of the circuit, these matrices are ill-conditioned, increasing the number of iterations required to achieve a solution. Further, this initialization is not always the most interesting (e.g., not the worst case, best case, or typical) or most likely state of the circuit.
Various solutions allow the state of one or more nodes to be initialized. In particular, based on previous electrical analysis, voltage-current tables are constructed, which then are used to initialize various node voltages according to desired circuit behavior. These tables feed controlled current sources connected to the node releasing the necessary current flow at its initial state. Though this solution is useful and feasible with available circuit simulators, it suffers from an explosion of data volume for the required tables, long processing time to characterize the tables, an implicit ill-conditioning of the matrices used in the circuit simulators, a loss of insight into the physical phenomenon, and/or the like.
In view of the foregoing, there exists a need in the art to overcome one or more of the indicated deficiencies and/or one or more other deficiencies not expressly discussed herein.